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| MITSUBISHI M62359P,FP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS DESCRIPTION The M62359 is a 8-channel 8-bit voltage output digital to analog converter. The M62359 includes data latch circuit and gain change circuit of output amplifiers. Input data is a easy-to-use three-wires serial interface. It is able to cascading serial use with Do terminal. Gain set up data change a case the each channels output voltage range is change ,and each channels output voltage range is able to change severally make use of gain set up data. PIN CONFIGURATION (TOP VIEW) LD CLK DI Ao5 Ao6 Ao7 Ao8 GND VrefL 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 R VDD DO Ao4 Ao3 Ao2 Ao1 Vcc VrefU FEATURES *All channel includes gain change latch circuit with output amplifiers. *14-bit serial data input *Built-in reset circuit Outline 18P4 LD CLK DI Ao5 Ao6 Ao7 Ao8 NC GND VrefL 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R VDD DO Ao4 Ao3 Ao2 Ao1 NC Vcc VrefU APPLICATION Conversion from digital control data to analog control data for home-use and industrial equipment. Automatic adjustment by combination with EEPROM and microcomputer(replacement of conventional half-fixed resistor). Signal gain control of DISPLAY-MONITOR or CTV. Outline 20P2N-A NC:NO CONNECTION BLOCK DIAGRAM R VDD Do Ao4 Ao3 Ao2 Ao1 Vcc VrefU GAIN CHANGE LATCH G G G -+ 8-BIT R-2R D-A -+ R-2R -+ R-2R -+ R-2R 8-BIT LATCH L L L 8 8-BIT LATCH L L L 2 8-BIT R-2R D-A R-2R R-2R R-2R GAIN CHANGE LATCH G G G LD CLK DI Ao5 Ao6 Ao7 Ao8 GND VrefL MITSUBISHI ELECTRIC ( 1/6) MITSUBISHI M62359P,FP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS EXPLANATION OF TERMINALS Pin No. 3 16 2 1 17 11 8 10 9 18 12 13 14 15 4 5 6 7 Symbol DI DO CLK LD VDD Vcc GND VrefU VrefL R Ao1 Ao2 Ao3 Ao4 Ao5 Ao6 Ao7 Ao8 Function Serial data input terminal Serial data output terminal Serial clock input terminal LD terminal input high level than latch circuit data load *1 Digital power supply terminal Analog power supply terminal Digital and Analog common GND D-A converter high level reference voltage input terminal D-A converter low level reference voltage input terminal Reset terminal 8-bit D-A converter output terminal *1 When the LD terminal is "H" input data has load. ABSOLUTE MAXIMUM RATINGS(Ta=25C, unless otherwise noted) Symbol VCC VDD VrefU VIN IDO IAO Topr Tstg Parameter Supply voltage Supply voltage D-A converter high level reference voltage Conditions Ratings -0.3~13.5 -0.3~7 VDD -0.3~VDD+0.3 -5~+5 -5~+5 -20~+85 -40~+125 Unit V V V V mA mA C C Input voltage Output current Buffer amplifier output current range Operating temperature Storage temperature RECOMMENDED OPERATING CONDITIONS *Digital supply voltage VDD 5V10% *Analog supply voltage Vcc VDD~13V ELECTRICAL CHARACTERISTICS Digital part(Vcc=13V,VDD=VrefU=5V, Ta=-25 to +85C,unless otherwise noted) Symbol VDD IDD VIL VIH VOL VOH Parameter Supply voltage Circuit current Input low voltage Input high voltage Output low voltage Output high voltage IOL=1.0mA IOH=-400A VDD-0.4 CLK=1MHz in action 0.8VDD 0.4 Test conditions Min. 4.5 Limits Typ. Max. 5.5 1 0.2VDD Unit V mA V V V V MITSUBISHI ELECTRIC ( 2/6) MITSUBISHI M62359P,FP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS Analog part(Vcc=13V,VDD=VrefU=5V,Ta=-20C~+85C, unless otherwise noted) Symbol Vcc Icc IrefU Parameter Supply voltage Circuit current D-A converter high level reference input current D-A converter high level reference voltage range D-A converter low level reference voltage range D-A converter output voltage range IAO =500A IAO =1mA All ch`s set up at 107/256 Test conditions Min. VDD 2 1.2 Limits Typ. Max. 13 4 2.5 VDD Unit V mA mA VrefU 3.5 0 0.1 0.2 -1.0 -1.5 -2 -2 -3 0.2 V V V mA LSB LSB LSB LSB % V/s VrefL VAO IAO DNL NL EZ EF Eo SR 1.5 Vcc-0.1 Vcc-0.2 2.5 1.0 1.5 2 2 3 Buffer amplifier output current range Differential nonlinearity Guaranteed monotonic Nonrineality Zero code error VrefU=4.79V Full scale error VrefL=0.95V without load Gain error Output slew rate TIMING CHART (MODEL) R MSB DI D13 D12 D11 LSB D0 CLK LD AO Input data is carried out LD signal Low besides CLK signal positive edge. CLK,LD is keep generally High level. MITSUBISHI ELECTRIC ( 3/6) MITSUBISHI M62359P,FP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS AC CHARACTERISTICS(Ta=25C,Vcc=13V,VDD=VrefU=5V,VrefL=0V,unless otherwise noted) Symbol tCKL tCKH tCR tCF tDCH tCHD tCHL tLDC tLDH tDO tLDD Parameter Clock "L"pulse width Clock "H"pulse width Clock rise time Clock fall time Data set up time Data hold time LD setup time LD hold time LD "H" pulse width Data output delay time Data output setting time CL=100pF Without load Test conditions Min 200 200 Limits Typ Max Unit ns ns ns ns ns ns ns ns ns ns s 200 200 60 100 200 100 100 70 350 300 TIMING CHART tCR tCKH tCF CLK tCKL DI tDCH tCHD tLDH tCHL LD tLDC tLDD D-A OUTPUT tDO DO OUTPUT MITSUBISHI ELECTRIC ( 4 /6) MITSUBISHI M62359P,FP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS DIGITAL FORMAT *14 bit serial data 1 2 DATA (LSB) 14 8 9 10 11 12 13 *DAC select data D10 0 0 D11 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D12 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D13 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DAC selection Don`t care Ao1 selection Ao2 selection Ao3 selection Ao4 selection Ao5 selection Ao6 selection Ao7 selection Ao8 selection Don`t care Don`t care Don`t care Don`t care Don`t care Don`t care Don`t care CK 0 0 0 *Data assignment :DAC select data 0 0 0 1 1 1 1 1 1 1 1 K 1 1.6 1.8 2.4 DAC output range (VrefU=5V,VrefL=0V) 0~5V 0~8V 0~9V 0~12V :GAIN set up data :DAC set up data (LSB) *GAIN set up data D8 0 1 0 1 D9 0 0 1 1 (MSB) *DAC set up data (LSB) D0 0 1 0 1 0 1 D2 0 0 0 0 1 1 D3 0 0 0 0 1 1 D4 0 0 0 0 1 1 D5 0 0 0 0 1 1 D6 0 0 0 0 1 1 (MSB) D7 0 0 0 0 1 1 DAC voltage 1/256*(VrefU-VrefL) *K +VrefL 2/256*(VrefU-VrefL) *K +VrefL 3/256*(VrefU-VrefL) *K +VrefL 4/256*(VrefU-VrefL) *K +VrefL 255/256*(VrefU-VrefL) *K +VrefL 256/256*(VrefU-VrefL) *K +VrefL Ao= 2 X D0 + 2 X D1 + 2 X D2 +********+ 2 X D6 + 2 X D7 + 1 * (VrefU - VrefL) *K + VrefL 256 K:Amplifiers gain 0 1 2 6 7 MITSUBISHI ELECTRIC ( 5/6) MITSUBISHI M62359P,FP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS APPLICATION CIRCUIT Vcc=13.5V max 5V 10F VCC VDD Ao1 ch1 Ao2 ch2 VrefU 10F Ao3 ch3 Ao4 ch4 *1 Ao5 ch5 Ao6 LD Ao7 MICRO COMPUTER CLK D1 GND VrefL Ao8 ch6 ch7 ch8 This ICs output amplifier has an advantage to capacitive load.So its no problem at device action when connect capacitor among output to GND for every noise eliminate. *1 If be used in a cathode-ray tube sets and high voltage sets,please connect capacitor among output to GND,about 0.1F~1F,because keep off effect of spark and electric discharge etc. MITSUBISHI ELECTRIC ( 6/6) |
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